Alarm system

ABSTRACT

An alarm system is disclosed wherein an alarm initiation loop, including sensing devices, an alarm bell loop and other auxiliary alarm and trouble indicating devices are supervised for continuity. Should a fault occur in one of these loops, such as for example a broken wire, a trouble indication is given and alternate paths are provided in the initiation and bell loops to insure that an alarm is given in case an alarm condition, such as a fire, should occur. A trouble indication is also given if the main power source should fail or if any auxiliary power sources utilized should fail or drop below safe limits. Also a trouble indication is given if a spurious conductive path should gradually build up in the alarm initiation load due to moisture for example.

I United States Patent [151 3,641,570 Thompson Feb. 8, 1972 [54] ALARM SYSTEM 3,267,288 8/1966 Maiden et al. ..307/66 [72] Inventor: Francis Tl pson 3482 Treenne 16/ Eetherow ..340/292 X Drive Murrysvme Pa [5668 isenberg... ..340/409 3,500,394 3/1970 Egesdal ..340/409 I [22] Filed: Apr. 2, 1969 Primary Examiner-Donald J. Yusko [21 1 Appl 812621 Assistant Examiner-Scott F. Partridge Attomey-F. H. Henson, C. F. Renz and A. S. Oddi [52] US. CL ..340/409, 307/65, 340/227.1,

340/276, 340/292, 340/333 [5 ABSTRACT [51] Int. Cl. ..G08b 17/06,G08b 19/00, G08b 29/00 An alarm System is disclosed wherein an alarm initiafion loop, [58] Field of Search ..340l292, 227, 227.1, 409, 276,

including sensing devices, an alarm bell loop and other auxilia- 340/213, 255, 234, 333, 307/64, 66, 65

ry alarm and trouble indicating devices are supervised for continuity. Should a fault occur in one of these loops, such as for [56] Cited example a broken wire, a trouble indication is given and al- UNH'ED STATES PATENTS temate paths are provided in the initiation and bell loops to insure that an alarm is given in case an alarm condition, such as 2,077,l45 4/1937 Grant, 11'. ..340/409 UX a fi should occur A trouble indication is also given if the 2,594,771 4/ 1952 madky et x main power source should fail or if any auxiliary power 2,695,994 11/1954 --340/292 x sources utilized should fail or drop below safe limits. Also a 2,736,012 2/ 1956 Bland et a1 ..340/227- trouble indication is given if a spurious conductive path should 2,944,251 7/ 1960 Tethel'owfl" "340/409 gradually build up in the alarm initiation load due to moisture 3,060,416 10/1962 Brown 340/227.l f example 3,099,825 7/1963 ..340/2l3 3,176,283 3/1965 Shanahan ..340/409 10 Claims, 3 Drawing Figures V1 V2 V3 TRANSFORMER 12V 12V POWER AUXILLIARY TROUBLE SUPPLY BATTERY SUPPLY BATTERY SUPPLY 14V DC 12V DC P8 P5 P6 AUCTIONEERING AUCTIONEERING VOLTAGE CIRCUIT CIRCUIT SUPERVISION ALARM TROUBLE POWER POWER Aw A+ VOLTAGE TC T+ VOLTAGE I ALARM TROUBLE I CIRCUIT CIRCUIT LOW CONDUCTANCE 1 BUILD-UP SC I I I ABL I AA ATB ATA I ALARM AUXILLIARY AUXILLIARY AUXILLIARY I BELL ALARM TROUBLE TROUBLE I LOOP BUZZER ALARM I I ML CONTINUITY SUPERVISION Ls I PATENTEBTEB' a I872 3.641.510

SHEET 1 0F 3 v1 v2 v3 TRANSFORMER 12v 12v POWER AUXILLIARY TROUBLE SUPPLY BATTERY SUPPLY BATTERY SUPPLY luv DC 12v DC P8 P5 Pal AUCTIONEERING f AUCTIONEERING VOLTAGE A21 ClRCUIT 5C3 CIRCUIT SUPERVISION ALARM TROUBLE POWER POWER A A+ VOLTAGE TC T+ VOLTAGE ALARM TROUBLE Vi CIRCUIT CIRCUIT CONDUCTANCE I BUILD-UP SO I ABL 1 AA ATB ITB ATA T? I 1 T l I ALARM AUXILLIARY AUXILLIARY INTERNAL AUXTLLLARY BELL ALARM TROUBLE TROUBLE TROUBLE i LOOP BUZZER BUZZER ALARM l 'T CONTINUITY ALARM SUPERVISION INITIATI LOOP LS L FIG. I.

WITNESSESZ INVENTOR #1 Francis T. Thomp on ALARM SYSTEM BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to alarm systems and, more particularly, to alarm systems providing supervision of the operative condition thereof.

2. Discussion of the Prior Art Most fire alarm systems of the prior art employ relays which are energized when an alarm condition occurs. The use of such electromechanical devices presents the reliability problems particularly due to dust collecting on the relay contracts. Any continuity supervision provided in relay operated firm alarm systems of the prior art is typically done by applying a small supervising current through the relay coils and the alarm bells of the system which are connected in series during the supervising operation. If an alarm condition should occur, the activation of a relay or relays causes the alarm bells to be switched from the series circuit relationship to a parallel circuit relationship for the activation on the bells. If the supervising current should be interrupted, a trouble indication is given. A representative system of this type is shown in US. Pat. No. 3,099,825.

Aside with the normal reliability problems associated with relays in the prior art system described, an open circuit fault even though given rise to a trouble indication would prevent the alarm portion of the system from operating to give an alarm if a fire or other alarm condition should occur during the open circuit fault. Therefore it would be highly desirable if a fire alarm system could be devised which would provide full continuity supervision yet automatically provide alternate paths for activating of the alarm bells of the system if an alarm condition should occur.

It also would be highly desirable if auxiliary power supplies could be provided for the alarm system in case of a failure of the main power supply and also to give an indication if any of the power supplies could fail or drop below a safe voltage for the operation of the alarm system. Under certain warm, damp climatic conditions, it has been noted that there is a gradual conductance buildup across the alarm sensing devices, which after a period of time can cause a false alarm to be activated. It would thus be a desirable feature of a supervised alarm system if such gradual spurious buildups of conductance could be sensed and a trouble indication given before causing a false alarm in the system.

SUMMARY OF THE INVENTION Broadly, the present invention provides an alarm system wherein the continuity of an alarm initiation loop, an alarm bell loop and other auxiliary alarm and trouble indicating devices are monitored and a trouble indication given if a lack of continuity is sensed. Alternate paths are provided in the initiation and bell loops to insure an alarm indication will be given in case an alarm condition should arise during the trouble period. Also failure and low voltage in the power supplies to the system are sensed to give a trouble indication, and the gradual buildup of a high conductance path in the alarm initiation loop is also sensed to avoid false alarms.

BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a simplified block diagram, of the alarm system of the present invention; and

FIG. 2 is a schematic diagram of the alarm system of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring to FIG. I, a fire alarm system is shown in block form and utilizes three power supplies V1, V2 and V3. Power supply VI comprises a transformer power supply which receives as an input thereto for example I volt, 60 Hz. power, which is normally available locally. The supply V2 comprises an auxiliary battery which may for example comprise I2-volt battery, and the supply V3 comprises a trouble battery which may also for example comprise a l2-volt battery. The transformer power supply Vl transforms the 120- volt AC input thereto and by rectification and filtering sup-' plies a DC output at an output terminal P8 thereof of for example l4 volts. The output at the terminal P8 is applied to the first auctioneering circuit AC1 which also has applied as inputs thereto the l2-volt outputs of the auxiliary battery V2 from a terminal P5 and the trouble battery output from a terminal P6. The auctioneering circuit AC1 is operative to select the highest of the three input voltages and hence supplies an alarm power voltage A+ at the output thereof. Normally, the output of the terminal P8 of the transformer pulse supply V1 will be the highest voltage and therefore it will determine the alarm power voltage A+ which is supplied to an alarm circuit A. If the transformer power supply Vl should fail, the auctioneering circuit AC1 will supply voltage appearing at the terminals P5 or P6 depending upon which of these is the higher at 7 that time.

The output of the terminal P8 of the transformer power supply V1 is also supplied to a second auctioneering circuit AC2 along with output from the terminal P6 of the trouble battery supply V2. The auctioneering circuitACZ selects the higher of the input voltages thereto to supply a trouble power.

, thereof. If one of the sensing devices in the alarm initiation loop AIL is activated, the alarm circuit A is activated thereby giving a normal connection therethrough from the alarm initiation AIL shown by the solid line. The activation of the alarm circuit A, which is supplied by the alarm power voltage A+, causes an alarm bell loop ABL to be activated thereby energizing the main alarm bells of the alarm system. Also an auxiliary alarm AA, which may be an indicator light, is also activated. The alarm circuit A also supplies an input to the trouble circuit TC which is supplied by the trouble power voltage T+, with the trouble circuit TC causing an auxiliary trouble buzzer ATB and an internal trouble buzzer [T8 to be activated thereby giving a trouble indication. Also an auxiliary trouble alarm ATA, which may comprise an indicator light, is activated in response to the trouble circuit TC. The alarm and trouble indications will continue until the system is reset.

Under normal operating conditions, continuity super vision is provided for the alarm initiation loop AIL, the alarm bell loop ABL, the auxiliary alarm AA, the auxiliary trouble buzzer ATB and the auxiliary trouble trouble alarm ATA, which are all coupled via a block labeled continuity supervision LS to the trouble circuit TC. Thus the alarm initiation loop AIL, the alarm bell loop ABL, the auxiliary alarm AA, the auxiliary trouble buzzer ATB and the auxiliary trouble alarm ATA are monitored to determine at all times whether continuous electrical circuit is provided therethrough. If this continuity fails in any of these loops or devices, which may be due to the breaking of one or more of the wires or the failure of a device or devices, an indication thereof is given to the trouble circuit TC which in response to the trouble indication causes the auxiliary trouble buzzer ATB, the internal trouble buzzer ITB, and/or the auxiliary trouble alarm ATA to be activated giving an indication of the trouble condition. This trouble condition will be maintained until the system is reset.

A unique feature of the present invention is that if the lack of continuity is sensed in the alarm initiation loop AIL or the alarm bell loop ABL, due to the breakage for example of one or more of the conductors thereof, in addition to providing a trouble indication to the trouble circuit TC an alternate conductive path is provided in both the alarm initiation loop' AIL- both. of these loops. Thus, if a fire should occur during this trouble period," with there being atrouble condition'in the alarminitiation loop AIL.or the alarm bell loop ABL, the

alarm initiation loop AIL1 will stillbe responsive to sense the fire through the alternate conductive. path established to the alarm circuit A. The'alarmcircuit A will hence be activated via the'alternate path to activate the alarm bell-loop ABL either through thenormal path or through the alternate path if thereis a'lack of-continuity through thenormal path and also will be operate to activate the auxiliary alarm AA. The provision of the alternate paths between the alarm circuit'A and the' alarm initiation loop AIL and alarm bell loop ABL provides the highly desirable system capability of sensing theipresence of the fire even though a lack of continuity may exist in either orboth of the alarm initiation and alarm bell loop. In prior art systems, even though a trouble condition may have been given, no provision is provided for automatically maintaining the fire alarm protection for which the system is .primarily intended if continuity should be broken. A full discussion of the technique'of providing alternate paths between the alarm circult A and fire alarm initiation loop AIL and the alarm bell loop ABL is set forth below with respect to FIG. 2.

A trouble indication is also given via'the trouble circuit TC if any of the supply sources Vl,'.V2 or V3 should fail or if the voltage of either the auxiliarybattery supply V,2 or the trouble supply battery V3 should drop below a predetermined. safe voltage level at the terminals P5 or F6. The monitoring of the supply voltages is accomplished through a voltage supervision circuit VS which receives as inputs thereto the outputs from the tenninals P8, T5 and P6 of the supply sources V1, V2 and V3 respectively. If thetransformer power supply V1, the auxiliarybatt'ery supply V2 or trouble battery supply V3 should fail, the voltage supervision circuits VS supplies as input to the trouble circuit TC which in response thereto'ac'tivates the auxiliary trouble buzzer ATB, the internal trouble buzzer [TB and the auxiliary trouble alarm .ATA. Also an indication is given from the voltage supervision'circuits VS to the trouble circuit TC'if the auxiliary .battery supply V2 of the trouble battery supply V3 should drop below safe limits which should also cause a trouble indicationto be givenbythe alarm system.

Another feature of thepresent invention is the capability of sensing a slow conductance buildup in. the alarm initiation loop AIL and to give anindication in response to such a conductance buildup. This is of particularimportance in warm, moist climates where a high conductance (low resistance) path may be developed across one of the fire-sensing devices of the alarm initiation loopAlL. The high conductance buildup may be due to moss, fungus or other growths prevalent in warm, moist climates. The buildup of such a high conductance path across one of the sensing devices after a period of time will cause a sufficiently high current to be provided in the alarm initiation loop AIL to activate the alarm circuit A thereby causing a false indication of a fire or other alarm condition to be given by the alarm system. This is of course a highly undesirable condition particularly if the fire alarm system is tied-in directly with the local fire department. In order to avoid such a false alarm, a slow conductance buildup path SC is provided in the present alarm system which warns of such a conductance buildup and activates the trouble circult/TC to give an indication that corrective action must be taken to remove the conductance buildup. The specific circuitry and operation for providing a trouble indication in response to, a slow conductance buildup is described with reference to FIG. below.

Another feature of the present invention is the utilization of the auxiliary battery supply V2 only for supplying the alarm circuit Aeven in the case when a trouble condition exists which would activate the trouble circuit TC and accordingly the trouble indicators 'ATB, [TB and ATA. .T he advantage of thisis that ifa trouble condition should occur, for example, due to an external power failure, so that the transformer power supply V1 does not supply an output, the trouble battery supply V3 will then supply the trouble power Tzl' via the auctioneering circuit AC2 and would thereby provide a trouble indication as long as the troublebattery supply produces a I sufficiently high output voltage therefrom. If no one should be available to monitor the trouble indication, the trouble output from. the alarm system wouldcontinue until the trouble battery supply V3 also'fails. However, theauxiliary batter supply V2' is not applied-to the auctioneering circuit AC2 and therefore would still be available to supply the alarm power voltage 'A.+ via the-auctioneering circuit AC1 even-though the other two power supplies V1 and V3 had failed. This again gives first priority to the fire alarm portion of the alarm. system and maintains the alarm circuit 'A. in operation to give an alarm output if a fire should occur even though boththe transformer power supply V1 and the trouble battery supply V3 had failed. With reference to the schematic diagram of FIG. 2, .the

specific details of how the above-described features. areaccomplished will now be discussedln FIG. 2 whenever possible the same reference characters will be utilized asin'FlG. 1.

A mode control switch S is utilized in FIG. 2 to control the various modes of operation of the. alarm system. The switch .5 has four operative positions, namely, normal, emergency, reset and test. As shown in FIG. 2, the switchS is inits normal position, with contact'points 2, 3, 4. and 5 commonly con nected; contact points 8 and 9 commonlyconnected; while circuits points 6, 1 l and 12 are disconnected from the system. A

The transformer power supply V'l' includes a transformer TF which has its primary winding connected across an external power source, which may comprise volts,"60' Hz.

power source. The transformer TF 'comprises a step down transformer with-the alternating voltage across the secondary are commonly connected with a filter capacitorCA being'connected betweenthe cathodes and the centertap'point of the secondary winding. A fuse 'Fl' couples thecommoncathode connection of 'thediodes DA and DB to the terminal P8 and the center-tapisecondary winding is connected to a terminal- Pl which defines the =common line for the alarm systemoA load resistor R1 is connected between the terminals P8 and P1 with a voltage of for example +l4 volts being developed between the circuit points T8 and T1 at the ends of the load resistor R1. The auxiliary battery supply V2 comprises abattery V2 which has its positive electrode connected through a fuse F2 to the terminal P5 and its negative electrode connected to a terminal P2 which is coupled to the common line. The trouble-battery supply V3-comprises a battery V3 which has its positive electrode connected via a fuse F3 to the ter minal P6 and itsnegatlve electrode connected to the terminal P2 at the common line.

The first auctioneering circuit AC1 includes a diode DI, a diode D2 and a diode D3 with the anodes of these diodes respectively connected to the terminals P8, P5 and P6. The cathodes of the diodes D1, D2 and D3 are commonly connected and define an A+ supply voltage. The tr sformer power supply V1 normally supplies a higher vol ge thanhowever, the transformer power supply VI should fail either the diode D2 or D3 will be forward biased depending upon which of the batteries V2 or V3.would supply the higher voltage so that the A+ supply would be maintained. The A+ supply from a circuit point T3 is applied to the contact points 2 and 3 of the switch S in order to provide alternate paths from the A t supply to the switch S. Redundant paths are also provided into an A+ bus via the contact points 4 and 5 of switch S. The A+ bus voltage is analogous to the alarm power voltage of FIG. 1. There is a direct connection from the circuit point 5 of the switch S to a circuit point T11 at the A+ bus and an auxiliary path is provided between the circuit point 4 of the A+ bus via a diode D6 connected from anode to cathode between the contact point 4 and the A+ bus. The redundant paths between the contact points 2 and 3 and the contact points 4 and 5 of the switch S are provided in case of failure of the switch S at one or another of the contact points.

The second auctioneering circuit AC2 includes a diode D4 and a diode D5. The anode of the diode D4 is connected to the positive output terminal P8 of the transformer power supply V1, and the anode of the diode D5 is connected to the positive electrode of the battery V3 at the terminal P6. The cathodes of the diodes D4 and D5 are commonly connected to a T+ bus for supplying the operating power for trouble indications in the alarm system. The T+ bus voltage is analogous to the trouble power voltage of FIG. 1. The output of the transformer power supply V1 and the trouble battery supply V3 are thus auctioneered by the diodes D4 and D5, with the diode D4 or D5 associated with the supply V1 or V3 providing the higher output being forward biased to supply the T+ bus and the other of the diodes being reverse biased.

The alarm initiation loop AIL is shown including three temperature or fire-sensing devices X1, X2 and X3. The sensing devices X1, X2 and X3 may comprise well-known temperature-sensing devices such as bimetallic stn'ps. Sensing devices X1, X2 and X3 are shown connected in parallel with an outside loop LU being defined between a terminal P7 and a terminal P9 and the inside loop L1 being defined between a terminal P1 1 and a terminal P10. The devices X1, X2 and X3 are connected between the outside and inside loops respectively. When a predetermined temperature is exceeded a short circuit is provided through the sensing device to complete a conductive path between the outside and inside loops. Only three sensing devices X1, X2 and X3 are shown for the purposes of simplicity, however, it should be understood that other sensing devices could also be connected between the outside and inside loops.

The normal alarm mode of operation of the present alarm system will now be discussed. Assume that an excessive temperature condition exists at the sensing device X2 causing a short circuit to be created across the device to connect electrically the outside loop L and the inside loop L1 of the alarm initiation loop AIL. A conductive path is then provided from the A+ bus to the terminal P11, the loop L1, the device X2, the loop L0, the terminal P7, a resistor R21, the base-emitter junction of an NPN-transistor Q2, a diode D31, a resistor R28 to the common line. In response to current being supplied to the base-emitter circuit of the transistor Q2 this transistor is rendered conductive with a gating voltage being developed across the resistor R28 connected in the emitter circuit of the transistor Q2. A time delay circuit including a capacitor C connected between the base electrode of the transistor Q2 and the common line a diode D30 and a resistor R21 is provided at the input of the transistor Q2 in order to provide to delay somewhat the turning on of the transistor Q2 and thereby avoid any false alarm due to a transient short across one of the sensing devices X1, X2 and X3 or other spurious malfunction. A capacitor C1 is connected between the terminal P7 and the common line in order to shunt any spurious signals that might be induced in the alarm system which might cause the transistor O2 to be turned on. A filter capacitor C2 is connected between the A+ bus and the common line to minimize any voltage fluctuation of the A+ bus. The collector of the transistor O2 is connected to the A+ bus via a resistor R26 and a resistor R13.

The gating voltage developed across the resistor R28 is applied to the gate electrode of an alarm controlled switching device Q7 which may comprise a silicon-controlled rectifier (SCR). In the alarm condition with one of the sensing devices X1, X2 and X3 shorted the gating voltage developed across the resistor R28 with the transistor Q2 conductive is sufi'icient to turn on the alarm SCR Q7 which provides a conductive path between the anode and cathode thereof with the cathode being connected to the common line.

The alarm bell loop ABL is connected in the anode circuit of the alarm SCR Q7 and in FIG. 2 is shown including an alarm bell No. 1 and an alarm bell No. 2. It should be understood of course that other alarm bells could be connected in parallel with these alarm bells. The alarm bells No. 1 and No. 2 would be conveniently disposed so as to provide a general alarm indication to the premises under supervision. With the alarm SCR 07 a conductive energizing circuit is provided from the A+ bus of a terminal P14 through the alarm bell No. 1, terminal P12, a diode D12, and the anode-cathode circuit of the alarm SCR Q7. The alarm bell No. 2 is also energized from the A+ bus, the terminal T14, the alarm bell No. 2, a terminal P13, a diode D13 and the anode-cathode circuit of the alarm SCR Q7. Also the auxiliary alarm AA, which may comprise an indicator light connected between a terminal P3 and P4, is energized with the turning on of the alarm SCR Q7. The current path therethrough is provided from the A+ supply, the contact points 5 and 4 of switch S, the terminal P3, and auxiliary alarm AA, the terminal P4, a diode D14 and the alarm SCR Q7.

In addition to an alarm indicator being given by the alarm bells Nos. 1 and 2 and the auxiliary alarm AA, a trouble indication is instigated by the conduction of the transistor Q2. A PNP-transistor Q6 is connected to the junction point between the resistors R13 and R26 in the collector circuit of the transistor Q2, with the emitter of the transistor Q6 being connected to the A+ bus and the collector thereof connected to a trouble line. The transistor O6 is normally nonconductive by being biased by the A+ bus via the resistor R13. l-lowevenit is rendered conductive by the conduction of the transistor Q2 and in response thereto applies current to the trouble line from the A+ bus to the emitter-collector circuit thereof supply base-emitter current to an NPN-transistor Q3 via a resistor R18, connected between the trouble line and the base of the transistor Q3. The collector of the transistor O3 is connected via a resistor R15 to the T+ bus, with the emitter thereof connected to the base of a NPN-transistor Q4 and through resistor R19 to the common line. The collector of the transistor Q4 is connection to the T+ via the contact point 9 and 8 of the switch s, the diodes D16 and D17, respectively and the auxiliary trouble buzzer ATB and auxiliary trouble alarm ATA, respectively. A Zener diode D33 is connected between the emitter of the transistor Q4 and the gate electrode of a trouble-controlled switching device, which may comprise a silicon-controlled rectifier, with a resistor R29 being connected between the anode of the Zener D33 and the common line. The turning on of the transistor Q3 also causes the transistor O4 to be rendered conductive so that sufficient voltage is developed across the Zener D33 so that sufficient gating current is supplied to the trouble SCR Q8 to turn it on. A time delay circuit is provided at the input of the transistor Q3 which includes a capacitor C6 connected between the base of the transistor Q3 and ground, a diode D32 connected across the resistor R18, and a resistor R11 connected between the cathode of the diode D32 and the common line. This time delay circuit prevents the transient triggering of the transistors Q3, Q4 and the trouble SCR Q8 which might be caused due to spurious conditions existing in the alarm system and thereby slows down the activation of a trouble indication.

The gating on of the trouble SCR Q8 causes the activation of the auxiliary trouble buzzer ATB, the internal trouble buzzer 1'18, and the auxiliary trouble alarm ATA. The energizing path for the auxiliary trouble buzzer ATB is provided from the T+ bus, a terminal P17, the auxiliary trouble buzzer ATB, a terminal P16, a diode D16, through the contact points 8 and 9 of the mode selection switch S and the anode-cathode circuit of the trouble SCR Q8. The energizing path for the internal trouble buzzer ITB is provided from the T,-+- bus, the terminal P17, the internal trouble buzzer ITB, a circuit point T21, the contact points 8 and 9 of the switch S and the anodecathode circuit of the trouble SCR Q8. A diode D8 is connected between the T+ bus and the circuit point T21 to limit positive voltage transients which could otherwise damage transistor 04. The energizing path for the auxiliary trouble alarm ATA is from the T+ bus, a terminal P19, the auxiliary trouble alarm ATA, the terminal P18, a diode D17, the contact points8 and 9 of the switch S and the anode-cathode circuit of the trouble SCR Q8. Thus, in response to an alarm condition existing across one of the sensing devices X1, X2 and X3 an alarm indication is given from the alarm bells Nos. 1

and 2 and the auxiliary alarm AA. Also trouble indications are given by the auxiliary trouble buzzer ATB, the internal trouble buzzer. ITB and the auxiliary trouble alarm ATA.

The continuity supervision features of the present invention will now be discussed. Assume under normal operating conditions when no alarm condition exists that a break BKl should occur in the alarm initiation loop AIL in the inner loop L1 adjacent the terminal P11 as indicated in FIG. 2. With a break BKl as shown a trouble indication is provided in the alarm system in the following manner. Under normal operating conditions the transistor Q6 is normally turned off. However, the break BKI causes the emitter-base junction of the transistor O6 to be forward biased with a conductive path being provided from the A+ bus to the emitter-base junction of the transistor Q6, the anode-cathode circuit of a diode D21,

which has its anode connected to the base of transistor Q6 and its cathode connected at a junction point J 1 through a resistor R24 and a resistor R2 to the common line. The resistor R24 is selected to have a small value of for example 10 ohms so that the junction point J1 is normally held at substantially the A+ bus potential when the break BKl does not exist. However, break BKI disconnects the junction point J1 from the A+ bus. Thus, with the junction point J1 being disconnected from the A+ bus, the circuit path is provided to ground via the emitterbase circuit of the transistor Q6and the resistors R24 and R2. The capacitor C4 is connected between the A+ bus and the junction J1 to suppress any noise transients. The emitter-base current in the transistor Q6 causes emitter-collector current to flow from the A+ bus thereby activating the trouble line causing the trouble SCR Q8 to be tumed' on which activates the auxiliary trouble buzzer ATB, the internal trouble buzzerITB and the auxiliary trouble alarm ATA, as previously described. Accordingly, the desired trouble indication is given when a break in continuity has occurred at the indicated break BKI in the alarm system.

Assume that the break BKl continues to-exist and an alarm condition arises in the alarm initiation loop AIL so that one of the temperature sensing devices X1, X2 or X3 is short circuited across the outside loop L and the inside loop L1. An important feature of the present invention is that an alternate path is provided around the break BKI to permit the activation of the alarm bells Nos. 1 and 2 even though there is a continuity break in the inner loop Ll of the alarm initiation loop AIL. This redundant path is automatically provided as follows from the A+ bus, through the emitter-base circuit of the transistor Q6, the diode D21, the resistor R24, one of the sensing devices X1, X2 or X3, the outer loop L0, terminal P7, the resistor R21, the base-emitter of the transistor Q2, the diode D31 and the resistor R28 to the common line. The activation of the transistor Q2 via the alarm initiation loop AIL causes sufficient base drive to be provided to the gate electrode of the alarm SCR Q7 which turns it on and provides the conductive path to the alarm bells Nos. 1 and 2 of the alarm bell loop ABL and the auxiliary alarm in AA, as previously described, a trouble indication having beenpreviously given due to the break BKl.

Assume now under normal operating conditions in the absence of an alarm condition that a break occurs at a point in the inner loop Ll indicated as break BKI' adjacent the terminal P10 instead of at break BKI adjacent the terminal P11.

A trouble indication due to the break BKl" is given by the same circuit path as for the trouble indication for the break BKI. This circuit path is the A+ bus, the emitter-base circuit of transistor Q6, the diode D21, resistors R24 and R2 to the common line. The break BKl' disconnects the circuit point- J 1 from the A+ bus potential and permits the conduction of the emitter-base of the transistor Q6 and the diode D21. The conduction of the transistor Q6 activates the trouble line which as described previously causes the auxiliary trouble buzzer ATB, the internal trouble buzzer ITB and the auxiliary trouble alarm ATA to be activated. i

If an alarm condition should exist with the break BKl an alarm condition would be given by an alternate circuit path being provided from the A+ v bus, the terminal P11, one of the sensing devices X1, X2 or X3, the outer loop L0, the terminal P7, the resistor R21, to activate the transistor Q2 and hence the alarm SCR Q7.

Assume now that under normal operating conditions in the absence of alarm condition that a break 8K2 occurs in the outer loop L0 at a point adjacent the terminal P7 with no other breaks in the alarm initiation loop AIL. A trouble indication is provided with a circuit path being provided from the A+ bus through the resistor R3, a resistor R25, a junction point J2, a diode D29, the base-emitter circuit of an NPN- transistor Q1, a resistor R27 to the common line. The circuit is' so arranged that insufficient current is supplied via the resistors R3 and R25, diode D29, the base-emitter of transistor Q1 and resistor R21 to turn on the transistor Q2 sufficiently to provide enough gating voltage across the resistor R28 to gate on the alarm SCR Q7. However, sufficient current is supplied in the base-emitter circuit of transistor 01 to turn on this transistor which is normally nonconductive. The collector of the transistor Q1 is connected via a resistor. R22 and the resistor R26 to the base of the transistor Q6. With the conduction of the transistor Q1, the base potential of the transistor Q6 is brought down sufficiently so that the transistor Q6 which is normally nonconductive is turned on so that current is supplied to the trouble line which in turn causes the transistors Q3, O4 to be turned on which supply'sufiicient gating current to turn on the trouble SCR O8 to activate the auxiliary trouble buzzer ATB the internal trouble buzzer ITB and the auxiliary trouble alarm ATA, as previously described. In the absence of the break BK2, the junction point J2 is nonnally-at'substantially same potential as the terminal P7 in the outer loop L0 in that the resistor R25 coupling the point P7 and the junction point J2 is selected to have a low value of for example 10 ohms. However, when the break 8K2 occurs, the junction point J2 is disconnected from the terminal P7 so that the diode D29 and thebase-emitter of the transistor Q1 may be forward biased by the A+ bus. A capacitor C3 isconnected between the junction point J2 and the terminal P7 to suppress noise transients and a resistor R14 is connected between the base of the transistor Q1 and the terminal P7 to keep transistor Q1 nonconducting under normal conditions.

If an alarm condition should occur across any of the sensing devices X1, X2 or X3 with the break BK2 in existence a redundant alarm path is provided around the break BK2 for activating the alarm bell loop ABL and the auxiliary alarm AA. This redundant path is provided from the A-lbus to terminal P11, one of the sensing devices X1, X2 or X3 terminal P9, the resistor R25, the diode D29, the base-emitter of the transistor Q1, the resistor R21, the base-emitter of the transistor Q2, the diode D31 and the resistor R28. Sufi'rcient current is supplied via the transistor O2 to gate on the alarm SCR Q7. This increased current is provided due to the factthat only the low resistance resistor R25 is in series with the base-emitter of the transistor Q2 during an alarm c ndition while during the trouble condition both the resistor R which is selected to have a relatively high resistance of for example 15 kilohrns, and the resistor R25 are placed in series with the base-emitter circuit of the transistor Q2. With sufficient gating voltage being supplied to the gate electrode of the alarm SCR 07, it is gated on thereby activating the alarm bells Nos. 1 and 2 and the auxiliary alarm AA as previously described.

If under normal operating conditions in the absence of an alarm condition a break 8K2 occurs adjacent the terminal P9 and no other continuity breaks exist, a trouble indication is given in the present alarm system by a similar current path being provided as for the break BKZ. This circuit path is from the A+ bus, the resistors R3 and R25, the diode D29, the baseemitter transistor Q1 and the resistor R27. With the transistor 01 being turned on, the transistor O2 is turned on to supply current to the trouble line which in turn activates the trouble SCR Q8. Insufficient current however is supplied to the transistor Q2 to cause the alarm SCR O7 to be turned on because of the relatively high impedance resistor R3 being in series with the A+ bus.

If an alarm condition should exist with the break BKZ', an alarm indication is given with the circuit path being provided from the A+ bus, the terminal P11, one of the sensing devices X1, X2 and X3, the outer loop L0, the terminal P7, the resistor R21, the base-emitter of the transistor Q2, diode D31 and the resistor R28. The alarm SCR O7 is activated since sufficient current is provided with the A+ bus being directly connected to the transistor Q2 via only the resistor R21.

It should also be noted that more than one of the breaks in the alarm initiation loop AIL can occur at the same time, while still providing trouble and alarm indications in the alarm system. Thus it can be seen that breaks BKl and 8K2, B141 and 8K2, BIG and BK2, or BKl' and BK2' can exist, with both trouble and alarm indications still being provided via the paths described above.

The alarm bell loop ABL is also supervised as to continuity and additionally provides alternate paths through the alarm bells Nos. 1 and 2 should breaks occur in the wires leading thereto. Assume for example that a break BK3 should occur adjacent the terminal P14 as indicated in FIG. 2. Thus a circuit path is provided from the A+ bus through the emitterbase of the transistor 06, the resistor R26, a resistor R20, a diode D22, a junction T13 and a resistor R4 to the common line. Normally, the junction T13 at the cathode of the diode 22 is at substantially the A+ bus potential. However, with break BK3 interrupting the continuity through the alarm bell 1 the junction T13 is no longer at the A+ bus which forward biases the diode D22 and the emitter-base of transistor 06 to complete a current path through the normally turned off transistor Q6 which then begins to conduct emitter-cathode current which supplies the trouble line with the necessary current to activate the trouble SCR Q8 and give the trouble indication in the alarm system.

Even thougha break BK3 existed, if an alarm condition should arise in the alarm system being sensed by one of the sensing devices X1, X2 and X3, the alarm SCR 07 would be turned on and an alternate path around the break 3 would be automatically provided to actuate the alarm bells Nos. 1 and 2. This redundant path is from the A+ bus through the diodes D9, D10, and D11 connected in series, the terminal P15, the alarm bell No. 2, the terminal P13, the diode D13 and the alarm SCR Q7, and alternately through the bell No. l, the terminal P12, the diode D12 and the alarm SCR Q7. Thus full alarm protection is provided even though the break BK3 interrupts one of the circuit paths in the alarm bell loop ABL.

Under normal operating conditions in the absence of an alarm condition if a break BK4 should occur adjacent the terminal P12, a trouble indication would be provided in the same manner as that if a break BK3 should have occurred since junction T13 would be disconnected from the A+ bus and therefore permitting a current path to be provided through the transistor Q6 and the diode D22 to cause the transistor O6 to supply current to the trouble line thereby turning on the trouble SCR 08. An alternate alarm path is provided for the alarm bells Nos. 1 and 2 if the break BK4 should exist. This path is from the A+ bus, terminal P14, the alarm SCR Q7, and also through the alarm bell No. 2, the tenninal P13, the diode D13 and the alarm SCR 07.

Under normal operating conditions in the absence of an alarm condition if a break BKS adjacent the terminal P13 should exist in the absence of other breaks in the alarm bell If an alarm condition should exist with the break BKS, a

redundant alarm path is automatically provided to the bells Nos. 1 and 2 from the A+ bus, bell No. 1, diode D12 and the alarm SCR Q7; the bell No. 2, the diode D12 and the alarm SCR Q7.

Under normal operating conditions in the absence of an alarm condition if a break 3K6 should occur adjacent the terminal P15 with no other breaks existing in the alarm bell loop, a trouble indication would be provided with a circuit path being established from the A+ bus, the emitter-base circuit of j the transistor Q6, the resistor R26, the resistor R20, the diode D24, a junction T16 and a resistor R6 to thecommori line. The break BK6 causes the junction T16 to bedisconnected from the A+ bus thereby permitting the conductivity of the transistor Q6 and the diode D24 to energize the trouble line and turn on the trouble SCR Q8. An alternate alarm path is automatically provided to the bells Nos. 1 and 2 from the A-ibus, the hell 1, the diode 12 and the alarm SCR Q7; and the bell 2, the diode D13 and the alann SCR Q7.

It should also be noted that multiple breaks could exist at 8K3 and 8K4, BK3 and BKS, and BK6 or BK4 and 'BK6 and the alarm system would still operate to provide both trouble and alarm indications.

Continuity supervision is provided for the auxiliary alarm AA via a diode D25 and a resistor R7, so that, if there is' a break of continuity in the normal series circuit of the auxiliary alarm AA, the junction point T17 between the resistor'R7 and diode D25 is disconnected from the A+ bus thereby permitting a current path to beprovided through the emitter-base junction of transistor Q6 and the diode D25. The conduction of the transistor Q6 provides current to the trouble line'and thereby activates the trouble SCR Q8.

The continuity of the auxiliary trouble buzzer ATB is monitored via a diode D26 and a resistor R8 having a junction point T19 therebetween so that an interruption of the continuity of the alarm trouble buzzer circuit will disconnect the T+ bus from the junction T19 thereby providing current path through the emitter-base circuit of the transistor Q6 and the diode D26 to turn on the transistor Q6 and supply current to the trouble line which in turn activates the trouble SCR Q8.

Continuity of the auxiliary trouble alarm ATA is supervised by a diode D27 and a resistor R9 having a junction point T22 therebetween which is normally held at the T+ bus potential. However, if a break should occur in the auxiliary trouble alarm circuit, the junction point T22 is disconnected therefrom causing the emitter-base circuit of the transistor 06 to conduct along with the diode D27, with the transistor Q6 turning on to supply current to the trouble line giving rise to the activation of the trouble SCR A8.

In summary, the alarm initiation loop including the outer loop L0 and the inner loop L1 and the alarm bell loops including the alarm bell No. 1 and the alarm bell No. 2 are continuity supervised. If a discontinuity should arise, a trouble indication is given by activating the trouble SCR Q8. Moreover, even should a break in continuity exist in the alarm initiation loop AIL or the alarm bell loop ABL in one or more of e conductors thereto an alternate redundant path is provided for the activation of an alarm indication in case an alarm condition should exist during a trouble condition. Also contin uity supervision is provided for the auxiliary alarm AA, the auxiliary trouble buzzer ATB, and the auxiliary trouble alarm ATA which instigates a trouble indication should an open circuit exist in any of the recited circuits.

The present alarm system also provides a trouble indication if there should be the gradual buildup of conductance across one or more of the temperature sensing devices X1, X2 or X3. Such a conductance buildup frequently arises in warm, damp climatic conditions wherein moss, fungus or other growths tend to accumulate across the inner and outer loops of the alarm initiation loop'AlL. After a period of time this may give rise to a false alarm condition should the resistance between the inner line L1 and the outer loop L be reduced to such a low value as to appear as substantially a short circuit appeared across one of the devices X1, X2 or X3. It would thus be highly desirable if a trouble indication could be provided in the alarm system indicating that a high conductance path was gradually building up in the alarm initiation loop AIL. This trouble indication is given in the following manner. Assume for example that a slow conductance buildup should occur as shown by the dotted line across the sensing device X1 which gradually builds up over a period of time until it reaches a critical value. A circuit path is then provided from the A+ bus, the terminal P11, the low conductance path between the inner loop L1 and the outer loop L. the terminal P7, the resistor R21, the base-emitter circuit of theti'ansistor 02, the diode D31 and the resistor R28 to the'common line. In response to this current flow, the transistor O2 is rendered slightly conductive which causes the voltage at the based the transistor Q6 which is coupled to the collector of the transistor Q2 via the resistor R26 to be lowered sufficiently to render conductive the normally nonconductive transistor Q6 so that current is provided to the trouble line. In response to the activation of the trouble line the trouble SCR O8 is turned on to activate the auxiliary trouble alarm ATA. The circuit parameters are so established that the alarm SCR Q7 is not activated by the a relatively low conductivity of the transistor Q2 being supplied through the low conductance path in the alarm initiation loop. Therefore, a false alarm signal is not given due to the slow conductance buildup, but rather a trouble indication is given before the alarms are actuated. With a trouble indication being so given, prior to the false alarm, corrective action can be taken to eliminate the buildup of the conductance paths in I the alarm initiation loop AIL.

The voltage supervision circuit VS shown schematically in FIG. 2 includes a transistor 05 of the PNP type which is normally nonconductive in its'normal operating mode. The function'of the circuit VS is to indicate the failure of the transformer power supply V1, theauxiliary battery supply V2, or the trouble batterysupply' V3 and also to indicate if either of the battery supplies should drop below a safe level. A reference voltage divider including a resistor R12 and a Zener diode D34 is connected between the A+ supply voltage developed at the cathode of the auctioneering diodes D1, D2 and D3 and the common line. A reference voltage as determined by the Zener voltage of the Zener D34, which for example may be 1 1 volts, is developed and applied to the emitter of the transistor Q5. The base of the transistor O5 is connected via a resistor R10 to the reference voltage. To compare the auxiliary battery voltage with the reference voltage, a diode D18 is connected between the base of the transistor Q5 and a circuit point T4 at the anode of the diode D2. A resistor R16 is connected between cathode of the diode D18 and ground. To compare the reference voltage with the trouble battery voltage, a diode D19 is connected between the base of the transistor Q5 and a circuit point T6 at the anode of the diode D3, with a resistor R17 being connected between the circuit point T6 and the common line. Thus if the auxiliary battery voltage V2 should drop below a certain levelof fail, the diode D18 which is normally reverse biased by the battery voltage V2 being applied to the cathode thereof, would become forward biased to permit a current path through the emitter-base junction of the transistor Q5, the diode D18 and the resistor R16. This current would turn on the normally turned off transistor 05 with the emitter-collector current thereof provided through a resistor'R23'to the base of the transistor O1. in response to this current the transistor Q1 which is normally nonconductive would be turned on so as to lower the base voltage of the-transistor Q6 turning it on so as to supply current to the trouble line. The trouble SCR O8 is turned on in response thereto to give a trouble indication in the alarm system. If the trouble battery voltage V3 should drop below a safe level or fail, a similar trouble indication would be given with the normally reverse biased diode D19 being forward biased. A current path is established through the emitter-base circuit of the transistor Q5, the diode D19 and the resistor R17, with the transistor Q5 being turned on in response thereto to render conductive the transistor O1. in response to the-conduction of the transistor Q1, the transistor O6 is turned on to supply current to the trouble line and activate the troubleSCRQ8.

I If the transformer power supply V1 should fail, a trouble indication would be given by providing a conductive path from the A+ bus, the emitter-base of the transistor Q6. the resistor R26, a diode D20, the circuit point T8 and the resistor R1 to the common line. The cathode of the diode D20 being connected to the circuit point T8 at the output terminal P8 of the transformer power supply V8 is normally reverse biased but withthe failure of the transistor power supply V1, the diode D20 is forward biased to provide the current path therethrough and through the transistor Q6 which. turns the transistor Q6 on to supply current to the trouble line which activates the trouble SCR 08 giving an indication that the transformerpower supply Vl has failed.

The preceding discussion has been with reference to the normal operating mode of the alarm system with the mode selection switches connected in its normal position as shown on FIG. 2. The emergency mode of operation is established through the mode selector switch and would primarily be usedafter a trouble indication has been given to provide full alarm protection while the trouble condition is being corrected; The emergency mode of operation is established by setting the switch S so that the contact points 2 and 3 thereof are commonly connected via the switch S tothe contact points 4, 5 and 6; disconnecting the circuit contact points 8 and 9; with the contact points 1 land 12 being disconnected as in the normal mode. The A+ supply potential from the terminals 2 and 3 is thus provided via the, contacts 4 and 5 as previously done in the normalmode and additionally the contact point 6 is connected to the A+ supply. The contact point 6 of the switch S is connected to the circuit pointT16 at the terminals 15 in the alarm b'ell loop ABL. This provides a redundant path for the A+ bus voltage supplied to the alarm bell loop, ABL in the emergency mode of operation and circumventsthe need of going from the A+ bus through the three diodes D9, D10 and D11 into the alarm bell loop. In the emergency mode by disconnecting the contacts points 8 and 9 of the switch S, all of the trouble indicators, that is, the internal trouble buzzer [T8, the auxiliary trouble buzzer ATB and the auxiliary trouble alarm ATA are deenergized. Trouble SCR Q8 resets to its nonconductive state when the T+ bus is disconnected therefrom by the opening of the contact points 8 and 9. Thus while operative in the emergency mode corrective action can be taken to correct the trouble condition which originally gave the trouble indication while still providing full alarm protection within the alarm system.

Once an alarm or trouble indication has been given in the alarm system, the system may be reset by settingthe .mode selection switch S to its reset position which disconnects the A+ supply at the circuit points 2 and 3 from any of the other contact points of the switch S and also disconnects the contact points 8 and 9 as are the contact points 11 and 12. Thus, if the alarm SCR 07 had been previously conductive it will then turn off with the disconnection of the A+ supply to reset the alarm portion of the alarm system. The opening of the {contact points 8 and 9 will deenergize the trouble SCR if it had been previously conductive to reset the trouble portion of the alarm system.

In order to test the operability of the alarm and trouble portions of the alarm system the mode selection switch S is placed in its test mode positiomln this mode the contact point 2 is the Ad; supply from the contact point 2 is applied to the contact points 11 and 12, and also the contact points 11 and 12 short circuit points T and T9 between the terminals P9 and P10 across the outer and inner loops of the alarm initiation loop AIL thereby providing an alarm condition for testing purposes. The circuit path for providing the alarm indication is provided from the A+ supply, the contact points 2, 11 and 12, the outer loop L0 of the alarm initiation loop AIL, resistor R21, transistor Q2 to turn on the alarm SCR Q7, which if the system is operating correctly will activate the alann bells Nos. 1 and 2 and the auxiliary alarm AA.

In this mode the alarm bells are supplied by a circuit path from the A+ supply, the contact points 2 and 11, the inner loop L1 of the alarm initiation loop AIL, terminal T11, the A+ bus, terminal P14, alarm bell 1, diode D12 and the alarm SCR Q7. Alarm bell 2 is also supplied through tenninal P14, alarm bell 2, diode D13 and the alarm SCR Q7. Thus a test of the operability of the alarm system is provided. To reset the alarm system into its normal operating mode the mode selection switch S will be placed in its reset mode to disconnect the A+ supplied from the alarm system which would turn off the alarm SCR Q7 and then the system would be set into its normal mode by the mode selection switch S being placed in its normal position.

Although the present invention has been described with a certain degree of particularity, it should be understood that the present disclosure has been made only by way of example and the numerous changes can be made in the details of the circuitry and the combination and arrangement of parts, elements and components can be resorted to without departing from the spirit and scope of the invention.

I claim as my invention:

1. In an alarm system operative with a source of operating voltage, the combination of:

an alarm initiation loop responsive to an alarm condition;

an alarm indicating loop for indicating the presence of an alarm condition;

alarm circuit means responsive to an alarm condition for activating said alarm indicating loop from said source;

trouble indicating means for indicating the presence of a trouble condition;

trouble circuit means responsive to the trouble condition for activating said trouble indicating means from said source; and

continuity supervision means for supervising the continuity of said alarm initiation loop, said alarm indicating loop and said trouble indicating means, and for automatically establishing an alternate circuit path in response to a break in continuity in either or both of said alarm initiation loop and said alarm indicating loop for activating said alarm indicating loop if an alarm condition should occur while the break in continuity exists, wherein said alarm initiation loop includes a plurality of alarm sensing devices connected therein for sensing an alarm condition,

said combination includes:

conductance sensing means for sensing when the conductance across any of said alarm devices in said alarm initiation loop has reached a predetermined value and providing an indication of a troublev condition to said trouble circuit means when said predetermined value of conductance is reached at a time prior to the time of an indication of an alarm condition is given by said alarm initiation loop to said alarm circuit means.

2. The combination of claim 1, wherein said source of voltage includes a primary source and a plurality of secondary sources,

said combination includes:

first auctioneering means for receiving the outputs of said primary source and said plurality of secondary sources and providing an alarm supply voltage in response to the highest of the received voltages for supplying said alarm circuit means; and

second auctioneering means for receiving the outputs of said primary source and selected of said plurality of said secondary sources and providing a trouble supply voltage in response to the highest of the received voltages for supplying said trouble circuit means,

at least one of said plurality of said secondary sources not being applied to said second auctioneering means to insure the maintenance of said alarm supply voltage even if all other secondary sources and said primary source should fail. 3. The combination of claim 1 wherein said source of,voltage includes a primary source and a plurality of secondary sources,

said combination includes: voltage supervision means for receiving the outputs of said primary and plurality of secondary sources and providing an indication of a trouble condition to said trouble circuit means if any of said outputs should fail or drop below a predetermined level, I 4. The combination of claim 1 wherein:

said alarm circuit means includes an alarm switching device responsive to an alarm condition in said alarm initiation loop to be rendered conductive and cause said alarm initiation loop to be activated from said source, i i

said trouble circuit means includes a trouble switching device responsive to a trouble condition to be rendered conductive and cause said trouble indicating means to be activated from said source.

5. The combination of claim 1 wherein:

said alarm circuit means includes an alarm switching device and an alarm-trouble translating device responsive to an alarm condition in said alarm initiation loop to translate sufficient current to said alarm switching device to render it' conductive to cause said alarm initiation loop to be activated from said source;

said trouble circuit means includes a trouble switching device,

said alarm-trouble translating device being responsive to a trouble condition to cause conduction of said trouble switching device to cause activation of said trouble indicating means from said source but supplying insufficient currentto said alarm switching device so that it is not rendered conductive.

6. The combination of claim 4 wherein:

said alarm circuit means includes an alarm-trouble translating device responsive to an alarm condition for rendering conductive said alarm switching device and being operative to effect the conduction of said trouble switching device in response to the alarm condition.

7. The combination of claim 1 wherein:

said continuity supervising means includes a semiconductor device having a junction which is normally reverse biased .by said supply when continuity exists and is forward biased when continuity is broken to be rendered conductive and instigate the activation of said trouble indicating means.

8. The combination of claim 7 wherein:

said alternate path being established through said junction of said semiconductor device if an alarm condition should occur during the time a break in continuity exists.

9. The combination of claim 1 including: 1

a mode selection switch for causing said system to be operative in: l

a. a normal mode wherein indications are given of alarm and trouble conditions in said system,

b. an emergency use for use when a trouble condition exists for insuring that supply voltage is supplied to said alarm circuit means in the case of an occurrence of an alarm condition,

c. a reset mode for resetting said alarm circuit means and said trouble circuit means after an alarm or trouble condition has occurred and d. a test mode for testing the operability of said alarm circuit means and said alarm indication loop by simulating an alarm condition in said alarm initiation loop.

10. In an alarm system operative with a source of operating voltage, the combination of:

an alarm initiation loop responsive to an alarm condition;

an alarm indicating loop for indicating the presence of an alarm condition;

alarm circuit means responsive to an alarm condition for activating said alarm indicating loop from said source;

trouble indicating means for indicating the presence of a trouble condition;

trouble circuit means responsive to the trouble condition for activating said trouble indicating means from said source; and

continuity supervision 'means for supervising the continuity of said alarm initiation loop, said alarm indicating loop and said trouble indicating means, and for automatically establishing an alternate circuit path in response to a break in continuity in either or both of said alarm initiation loop and said alarm indicating loop for activating said alarm indicating loop if an alarm condition should occur while the break in continuity exists, wherein said alarm initiating loop includes a plurality of alarmsensing devices connected therein for sensing an alarmv 

1. In an alarm system operative with a source of operating voltage, the combination of: an alarm initiation loop responsive to an alarm condition; an alarm indicating loop for indicating the presence of an alarm condition; alarm circuit means responsive to an alarm condition for activating said alarm indicating loop from said source; trouble indicating means for indicating the presence of a trouble condition; trouble circuit means responsive to the trouble condition for activating said trouble indicating means from said source; and continuity supervision means for supervising the continuity of said alarm initiation loop, said alarm indicating loop and said trouble indicating means, and for automatically establishing an alternate circuit path in response to a break in continuity in either or both of said alarm initiation loop and said alarm indicating loop for activating said alarm indicating loop if an alarm condition should occur while the break in continuity exists, wherein said alarm initiation loop includes a plurality of alarm sensing devices connected therein for sensing an alarm condition, said combination includes: conductance sensing means for sensing when the conductance across any of said alarm devices in said alarm initiation loop has reached a predetermined value and providing an indication of a trouble condition to said trouble circuit means when said predetermined value of conductance is reached at a time prior to the time an indication of an alarm condition is given by said alarm initiation loop to said alarm circuit means.
 2. The combination of claim 1, wherein said source of voltage includes a primary source and a plurality of secondary sources, said combination includes: first auctioneering means for receiving the outputs of said primary source and said plurality of secondary sources and providing an alarm supply voltage in response to the highest of the received voltages for supplying said alarm circuit means; and second auctioneering means for receiving the outputs of said primary source and selected of said plurality of said secondary sources and providing a trouble supply voltage in response to the highest of the received voltages for supplying said trouble circuit means, at least one of said plurality of said secondary sources not being applied to said second auctioneering means to insure the maintenance of said alarm supply voltage even if all other secondary sources and said primary source should fail.
 3. The combination of claim 1 wherein said source of voltage includes a primary source and a plurality of secondary sources, said combination includes: voltAge supervision means for receiving the outputs of said primary and plurality of secondary sources and providing an indication of a trouble condition to said trouble circuit means if any of said outputs should fail or drop below a predetermined level.
 4. The combination of claim 1 wherein: said alarm circuit means includes an alarm switching device responsive to an alarm condition in said alarm initiation loop to be rendered conductive and cause said alarm initiation loop to be activated from said source, said trouble circuit means includes a trouble switching device responsive to a trouble condition to be rendered conductive and cause said trouble indicating means to be activated from said source.
 5. The combination of claim 1 wherein: said alarm circuit means includes an alarm switching device and an alarm-trouble translating device responsive to an alarm condition in said alarm initiation loop to translate sufficient current to said alarm switching device to render it conductive to cause said alarm initiation loop to be activated from said source; said trouble circuit means includes a trouble switching device, said alarm-trouble translating device being responsive to a trouble condition to cause conduction of said trouble switching device to cause activation of said trouble indicating means from said source but supplying insufficient current to said alarm switching device so that it is not rendered conductive.
 6. The combination of claim 4 wherein: said alarm circuit means includes an alarm-trouble translating device responsive to an alarm condition for rendering conductive said alarm switching device and being operative to effect the conduction of said trouble switching device in response to the alarm condition.
 7. The combination of claim 1 wherein: said continuity supervising means includes a semiconductor device having a junction which is normally reverse biased by said supply when continuity exists and is forward biased when continuity is broken to be rendered conductive and instigate the activation of said trouble indicating means.
 8. The combination of claim 7 wherein: said alternate path being established through said junction of said semiconductor device if an alarm condition should occur during the time a break in continuity exists.
 9. The combination of claim 1 including: a mode selection switch for causing said system to be operative in: a. a normal mode wherein indications are given of alarm and trouble conditions in said system, b. an emergency use for use when a trouble condition exists for insuring that supply voltage is supplied to said alarm circuit means in the case of an occurrence of an alarm condition, c. a reset mode for resetting said alarm circuit means and said trouble circuit means after an alarm or trouble condition has occurred and d. a test mode for testing the operability of said alarm circuit means and said alarm indication loop by simulating an alarm condition in said alarm initiation loop.
 10. In an alarm system operative with a source of operating voltage, the combination of: an alarm initiation loop responsive to an alarm condition; an alarm indicating loop for indicating the presence of an alarm condition; alarm circuit means responsive to an alarm condition for activating said alarm indicating loop from said source; trouble indicating means for indicating the presence of a trouble condition; trouble circuit means responsive to the trouble condition for activating said trouble indicating means from said source; and continuity supervision means for supervising the continuity of said alarm initiation loop, said alarm indicating loop and said trouble indicating means, and for automatically establishing an alternate circuit path in response to a break in continuity in either or both of said alarm initiation loop and said alarm indicating loop for activating said alarm indicating loop If an alarm condition should occur while the break in continuity exists, wherein said alarm initiating loop includes a plurality of alarm-sensing devices connected therein for sensing an alarm condition, said alarm indicating loop includes a plurality of alarm-indicating devices connected therein for giving an indication of an alarm condition, said trouble indicating means includes a plurality of trouble-indicating devices for giving an indication of a trouble condition; said combination further including an auxiliary alarm device for giving an indication of an alarm condition in response thereto; said continuity supervision means supervising the continuity of said auxiliary alarm device, said alarm-indicating devices and selected of said trouble-indicating devices. 